News

  • [2025/07/14] Our paper, Swift and Trustworthy Large-Scale GPU Simulation with Fine-Grained Error Modeling and Hierarchical Clustering, has been accepted at MICRO 2025.
  • [2025/07/08] Our paper, Contention-Aware GPU Thread Block Scheduler for Efficient GPU-SSD, has been accepted for publication in IEEE Computer Architecture Letters (CAL).
  • [2025/04/08] I have been awarded the Outstanding Post-doctoral Research Award by the College of Computing at Georgia Tech.
  • [2025/03/21] Our paper, Unified Memory Protection with Multi-granular MAC and Integrity Tree for Heterogeneous Processors, has been accepted at ISCA 2025.
  • [2025/02/11] Our paper, FlexInfer: Flexible LLM Inference with CPU Computations, has been accepted at MLSys 2025.
  • [2025/02/04] I will serve as Program Committee for ASPLOS 2026.
  • [2025/01/14] I will serve as Workshops/Tutorials Chair for IISWC 2025.
  • [2024/12/03] I will serve as Program Committee for GPGPU 2025.
  • [2024/11/02] Our paper, Let-Me-In: (Still) Employing In-pointer Bounds metadata for Fine-grained GPU Memory Safety, has been accepeted at HPCA 2025.
  • [2024/10/01] I have been selected as one of the presenters for the MICRO 2024 PhD Forum.
  • [2024/09/06] I will serve as Program Committee for IPDPS 2025.
  • [2024/08/15] I will serve as Artifact Evaluation Committee for MICRO 2024.
  • [2024/07/16] Our paper, Understanding Performance Implications of LLM Inference on CPUs, has been accepted at IISWC 2024.
  • [2024/07/13] I will serve as Travel Grants Co-Chairs for ASPLOS 2025.
  • [2024/05/30] Our paper, Allegro: GPU Simulation Acceleration for Machine Learning Workloads, has been accepted at MLArchsys.
  • [2024/04/29] I will serve as Artifact Evaluation Committee for OSDI 2024 / ATC 2024.
  • [2024/03/31] I will serve as Program Committee for SC 2024.
  • [2024/03/19] Our paper, Barre Chord: Efficient Virtual Memory Translation for Multi-Chip-Module GPUs, has been accepted at ISCA 2024.
  • [2023/10/24] Our paper, Supporting Secure Multi-GPU Computing with Dynamic and Batched Metadata Management, has been accepted at HPCA 2024.
  • [2023/07/24] Our paper, Improving Data Reuse in NPU On-chip Memory with Interleaved Gradient Order for DNN Training , has been accepted at MICRO 2023.
  • [2022/12/13] I will be joining the HPArch group as a postdoctoral researcher.
  • [2022/12/09] I defended my Ph.D. thesis and submitted my dissertation.
  • [2022/08/23] Our paper, Tunable Memory Protection for Secure NPUs , has been accepted at ICCD 2022.
  • [2021/10/28] Our paper, TNPU: Supporting Trusted Execution with Tree-less Integrity Protection for Neural Processing Unit, has been accepted at HPCA 2022.
  • [2020/10/17] Our paper, Common Counters: Compressed Encryption Counters for Secure GPU Memory, has been accepted at HPCA 2021.