2024 IISWC Understanding Performance Implications of LLM Inference on CPUs Seonjin Na, Geonhwa Jeong, Byunghoon Ahn, Jeffrey Young, Tushar Krishna, and Hyesoon Kim In IEEE International Symposium on Workload Characterization , 2024 PDF Slides MLArchSys Allegro: GPU Simulation Acceleration for Machine Learning Workloads Euijun Chung, Seonjin Na, and Hyesoon Kim In MLArchSys in ISCA , 2024 PDF Slides ISCA Barre Chord: Efficient Virtual Memory Translation for Multi-Chip-Module GPUs Yuan Feng, Seonjin Na, Hyesoon Kim, and Hyeran Jeon In IEEE International Symposium on Computer Architecture (ISCA) , 2024 PDF Slides HPCA Supporting Secure Multi-GPU Computing with Dynamic and Batched Metadata Management Seonjin Na, Jungwoo Kim, Sunho Lee, and Jaehyuk Huh In IEEE International Symposium on High-Performance Computer Architecture (HPCA) , 2024 PDF Slides 2023 MICRO Improving Data Reuse in NPU On-chip Memory with Interleaved Gradient Order for DNN Training Jungwoo Kim, Seonjin Na, Sanghyeon Lee, Sunho Lee, and Jaehyuk Huh In IEEE/ACM International Symposium on Microarchitecture (MICRO) , 2023 PDF Slides 2022 ICCD Tunable Memory Protection for Secure Neural Processing Units Sunho Lee, Seonjin Na, Jungwoo Kim, Jongse Park, and Jaehuyk Huh In IEEE International Conference on Computer Design (ICCD) , 2022 PDF Slides HPCA TNPU: Supporting Trusted Execution with Tree-less Integrity Protection for Neural Processing Unit Sunho Lee, Jungwoo Kim, Seonjin Na, Jongse Park, and Jaehuyk Huh In IEEE International Symposium on High-Performance Computer Architecture (HPCA) , 2022 PDF Slides 2021 HPCA Common Counters: Compressed Encryption Counters for Secure GPU Memory Seonjin Na, Sunho Lee, Yeonjae Kim, Jongse Park, and Jaehyuk Huh In IEEE International Symposium on High-Performance Computer Architecture (HPCA) , 2021 PDF Slides