Seonjin Na
Senior High Performance AI Engineer at NVIDIA.
I’m a Senior High Performance AI Engineer at NVIDIA, accelerating AI workloads on NVIDIA GPUs through GPU architecture and full-stack software optimization. I focus on accelerating distributed AI training/inference for LLMs and multi-modal models through GPU-centric runtimes and system-level solutions.
Prior to joining NVIDIA, I was a Postdoctoral Fellow in the HPArch Group at Georgia Institute of Technology, supervised by Prof. Hyesoon Kim. I received my Ph.D. from the School of Computing at KAIST in 2023, advised by Prof. Jaehyuk Huh.
My research interests lie in GPU architecture, trusted computing, heterogeneous systems, distributed computing, and systems for machine learning. During my Ph.D., I focused on building secure architectures to provide trusted execution environments (TEE) on accelerators such as GPUs and NPUs with minimal performance overhead. Currently, I am actively engaged in expanding my research to address various challenges in multi-GPU architecture, hardware security, and accelerating large language models (LLMs).
Research Interest (Keyword): GPU/NPU Architecture, Secure Architecture for GPU/NPU, Systems for Machine Learning.
Work Experiences
NVIDIA
11/2025 - Present
Senior High Performance AI Engineer
HW-SW Co-Design for Efficient and Scalable AI Training/Inference
Georgia Institute of Technology (Georgia Tech)
06/2023 - 10/2025
Postdoctral Fellow
Worked with Hyesoon Kim
Microsoft Research
03/2019 - 06/2019
Research Intern
Mentors: Lintao Zhang and Yunxin Liu
KAIST
03/2018- 02/2023
Graduate Research Assistant
Advisor: Jaehyuk Huh
News
| Nov 01, 2025 | I will serve as External Program Committee for ISCA 2026. |
|---|---|
| Jul 25, 2025 | I will be joining NVIDIA as a Senior High Performance AI Engineer. |
| Jul 14, 2025 | Our paper, Swift and Trustworthy Large-Scale GPU Simulation with Fine-Grained Error Modeling and Hierarchical Clustering, has been accepted to MICRO 2025. |
| Jul 07, 2025 | Our paper, Contention-Aware GPU Thread Block Scheduler for Efficient GPU-SSD, has been accepted for publication in IEEE Computer Architecture Letters (CAL). |
| Apr 08, 2025 | I have been awarded the Outstanding Post-doctoral Research Award by the College of Computing at Georgia Tech. |
| Mar 22, 2025 | Our paper, Unified Memory Protection with Multi-granular MAC and Integrity Tree for Heterogeneous Processors, has been accepted to ISCA 2025. |
| Feb 11, 2025 | Our paper, FlexInfer: Flexible LLM Inference with CPU Computations, has been accepted to MLSys 2025. |
| Feb 04, 2025 | I will serve as Program Committee for ASPLOS 2026. |
| Jan 14, 2025 | I will serve as Workshops/Tutorials Chair for IISWC 2025. |
| Dec 03, 2024 | I will serve as Program Committee for GPGPU 2025. |
| Nov 02, 2024 | Our paper, Let-Me-In: (Still) Employing In-pointer Bounds metadata for Fine-grained GPU Memory Safety, has been accepeted to HPCA 2025. |
| Oct 01, 2024 | I have been selected as one of the presenters for the MICRO 2024 PhD Forum. |
| Sep 06, 2024 | I will serve as Program Committee for IPDPS 2025. |
| Aug 16, 2024 | I will serve as Artifact Evaluation Committee for MICRO 2024. |
| Jul 24, 2024 | I will serve as Artifact Evalution Committee for EuroSys 2025. |
| Jul 17, 2024 | Our paper, Understanding Performance Implications of LLM Inference on CPUs, has been accepted to IISWC 2024. |
| Jul 13, 2024 | I will serve as Travel Grants Co-Chairs for ASPLOS 2025. |
| Jul 02, 2024 | I will serve as Artifact Evaluation Committee for ASPLOS 2025. |
| May 30, 2024 | Our paper, Allegro: GPU Simulation Acceleration for Machine Learning Workloads, has been accepted to MLArchsys. |
| Apr 30, 2024 | I will serve as Artifact Evaluation Committee for OSDI 2024 / ATC 2024. |
| Apr 01, 2024 | I will serve as Program Committee for SC 2024. |
| Mar 20, 2024 | Our paper, Barre Chord: Efficient Virtual Memory Translation for Multi-Chip-Module GPUs, has been accepted to ISCA 2024. |
| Feb 23, 2024 | I will serve as Artifact Evaluation Committee for ISCA 2024. |
| Feb 22, 2024 | I will attend GPGPU 2024 workshop as a moderator. |
| Oct 24, 2023 | Our paper, Supporting Secure Multi-GPU Computing with Dynamic and Batched Metadata Management, has been accepted to HPCA 2024. |
| Jul 24, 2023 | Our paper, Improving Data Reuse in NPU On-chip Memory with Interleaved Gradient Order for DNN Training , has been accepted to MICRO 2023. |
| Dec 13, 2022 | I will be joining the HPArch group as a postdoctoral researcher. |
| Dec 09, 2022 | I successfully defended my Ph.D. Thesis 🎓. |
| Aug 23, 2022 | Our paper, Tunable Memory Protection for Secure NPUs , has been accepted to ICCD 2022. |
| Oct 28, 2021 | Our paper, TNPU: Supporting Trusted Execution with Tree-less Integrity Protection for Neural Processing Unit, has been accepted to HPCA 2022. |
| Oct 28, 2020 | Our paper, Common Counters: Compressed Encryption Counters for Secure GPU Memory, has been accepted to HPCA 2021. |
Publications
- CALContention-Aware GPU Thread Block Scheduler for Efficient GPU-SSDIn IEEE Computer Architecture Letters (CAL) , 2025